1. Field of the Invention
The present invention relates to a semiconductor device substrate and a process for preparing the same, and more particularly to a semiconductor device substrate suitable for an electronic device dielectrically isolated or formed on a monocrystalline semiconductor layer on an insulator and an integrated circuit, and a process for preparing the same.
2. Related Background Art
Formation of a monocrystalline Si semiconductor layer on an insulator is widely known as a silicon-on-insulator (SOI) technique and has been extensively studied because devices based on utilization of the SOI technique have many advantages that have not be obtained in case of bulk Si substrates for preparing ordinary Si integrated circuits. That is, the following advantages can be obtained by utilizing the SOI technique:
1. Easy dielectric isolation with a possibility of higher level integration,
2. Distinguished resistance to radiation,
3. Reduced floating capacity with a possibility of higher speed,
4. Omission of well formation step
5. Prevention of latch-up,
6. Possibility to form a fully depleted, field effect transistor by thin film formation, etc.
To obtain the above-mentioned many advantages of device characteristics, processes for forming the SOI structure have been studied for several ten years. The results are summarized for example, in the following literature: Special Issue: "Single-crystal silicon on non-single-crystal insulators", edited by G. W. Cullen, Journal of Crystal Growth, Volume 63, No. 3, pp 429-590 (1983).
In the past, SOS (silicon-on-sapphire) formed by heteroepitaxial growth of Si on a monocrystalline sapphire substrate by CVD (chemical vapor deposition) was disclosed as a successful result of most matured SOI technique, but its wide application was interrupted by the occurrence of many crystal defects due to lattice mismatching at the interface between the Si layer and the underlayer sapphire substrate, by diffusion of aluminum into the Si layer from the sapphire substrate, and largely by a high cost of the substrate and delay in formation of larger area.
Recently, some attempts have been made to form an SOI structure without using the sapphire substrate. The attempts can be classified into the following two major groups.
1. After the surface oxidation of a Si monocrystalline substrate, windows are made to partially expose the Si substrate, and a Si monocrystalline layer is formed on the SiO.sub.2 by epitaxial growth of Si in the lateral direction, while utilizing the exposed portion of the Si substrate as seeds. (In this case, deposition of the Si layer on the SiO.sub.2 is made.)
2. A Si monocrystalline substrate itself is utilized as an active layer and SiO.sub.2 is formed as its underlayer. (In this case, no Si layer is deposited.)
The following means are known to realize the above group 1: a process for direct epitaxial growth of a monocrystalline Si layer in the lateral direction by CVD; a process for deposition of amorphous Si and successive epitaxial growth in the lateral direction in the solid phase by heat treatment; a process for irradiation of an amorphous or polycrystalline Si layer with a converged energy beam such as an electron ray, a laser beam, etc. to made a monocrystalline layer grow on SiO.sub.2 through melting and recrystallization; and a process for scanning a melt zone by a rod heater bandwise (Zone Melting Recrystallization). These processes have advantages and disadvantages together, and still have problems in the controllability productivity, uniformity and quality, and thus have not be commercially used. For example, the CVD process requires sacrificial oxidation to form a flat thin film, whereas the solid phase growth process suffers from poor crystallinity. The beam anneal has problems in the treating time by the converged beam, the state of overlapped beams, focus adjustment, etc. Among them, the zone melting recrystallization process in a most matured process, by which relative large integrated circuits have been made on trail, but there remain still many crystal defects such as quasigrain boundaries, etc. and thus minority carrier devices have not yet been made.
The process without using the Si substrate as a seed for epitaxial growth as the above-mentioned group 2 includes the following 4 procedures.
1. An oxide film is formed on the surface of a Si monocrystalline substrate, the surface having anisotropically etched V-shaped grooves; a polycrystalline Si layer is deposited on the oxide film to the same thickness as that of the Si substrate; and then the back side of the Si substrate is polished to form dielectrically isolated Si monocrystalline regions, which are surrounded by the V-shaped grooves on the thick polycrystalline Si layer. This procedure gives a good crystallinity, but still has problems of controllability and productivity in the step of depositing the polycrystalline Si layer to a thickness of several hundred microns and the step of polishing the back side of the monocrystalline Si substrate to leave only dielectrically separated Si active layer.
2. A SiO.sub.2 layer in formed by implanting oxygen ions into a Si monocrystalline substrate called "SIMOX (separation by ion-implanted oxygen)". This procedure is now the most matured one because of a good matching with Si process. However, in order to form the SiO.sub.2 layer, oxygen ions must be implanted at least at 10.sup.18 ions/cm.sup.2, and the implantation time is very long and the productivity is not so high. The wafer cost is also high. Furthermore, there remain many crystal defects. That is, no commercially satisfactory quality for making minority carrier devices can be obtained.
3. Procedure for making an SOI structure by dielectric isolation on the basis of oxidation of porous Si. The procedure comprises forming an n-type Si layer of island shape on the surface of a p-type Si monocrystalline substrate by proton ion implantation (Imai et al: J. Crystal Growth, Vol. 63,547 (1983)) or by epitaxial growth and patterning, then making only the p-type Si substrate porous by anodization in a HF solution so as to surround the Si island from the surface, and then dielectrically isolating the n-type Si island by accelerated oxidation. This procedure has such a problem that the isolated Si region is predetermined before the device step and the degree of freedom of device design is limited in some cases.
4. Independently from the above-mentioned conventional procedure for forming an SOI structure, a procedure for forming an SOI structure by bonding a Si monocrystalline substrate to another thermally oxidized Si monocrystalline substrate by heat treatment or an adhesive has recently attracted attention. According to this procedure it is necessary to make the active layer for the device into a uniform thin film. That is, a Si monocrystalline substrate having a thickness of several hundred microns must be made into a thin film having a thickness of micron order or less. To make such a thin film, the following two procedures are available.
(1) Thin film formation by polishing.
(2) Thin film formation by selective etching.
According to the procedure by polishing (1), it is difficult to obtain a uniform thin film. Particularly in case of thin films having a thickness of submicron order, fluctuation of thickness amounts to several tens %. That is, the poor uniformity is a problem. With increasing wafer diameter the difficulty is much pronounced.
The procedure by selective etching (2) is effective for obtaining a uniform thin film, but still has the following problems:
(i) selectivity is about 10.sup.2 at highest and thus is not satisfactory,
(ii) surface condition is not good after the etching, and
(iii) crystallinity of SOI layer is poor dur to epitaxial growth or heteroepitaxial growth on the ion-implanted, highly concentrated B-doped Si layer (C. Harendt, et. al., J. Elect. Mater. Vol. 20, 267(1991), H. Baumgart, et al., Extended Abstract of ECS 1st International Symposium of Wafer Bonding, pp-733(1991), C. E. Hunt, Extended Abstract of ECS 1st International Symposium of Wafer Bonding, pp-696(1991)).
A procedure for providing an etch-stop layer makes it possible to conduct selective etching, and includes, for example, a procedure for providing a p.sup.+ layer as an etch-stop layer (C. E. Hunt, et al., ECS 1st International Symposium on Semiconductor Wafer Bonding Science, Technology, and Applications, Abstract, p 696 (1991)). According to this procedure a p.sup.+ layer having a concentration of about 1.times.20.sup.20 cm.sup.-2 is used, and the p.sup.+ layer can be formed mainly by epitaxial growth or by ion implanting.
Epitaxial growth has such a problem that Si of good crystallinity cannot be formed on the p.sup.+ layer by eiptaxial growth, whereas ion implanting has such a problem that high energy-high dose ion implanting is required for forming a low concentration layer on the surface, resulting in a higher cost and failure to make the SOI layer into a thin film.
On the other hand, U.S. Pat. No. 5,013,681 discloses a process comprising forming a mixed crystal (etch-stop layer) of Si and other group IV semiconductor on an Si substrate, then forming an Si layer thereon, bonding the Si substrate to a supporting substrate, then removing the Si substrate while using the mixed crystal as an etch-stop layer, and then removing the etch-stop layer so that the Si layer may not be etched. Specifically, selective etching of Si and SiC, Si and SiGe, or Si and SiSn, etc. are carried out. According to the process disclosed in U.S. Pat. No. 5,013,681, it is necessary to make an Si layer, which constitutes the SOI structure, to epitaxially grow on the mixed crystal of Si-Group IV semiconductor and it is very hard to prevent the crystallinity of the Si layer from deterioration. Furthermore, in U.S. Pat. No. 5,013,681, the crystallinity of the Si layer is considerably deteriorated, because the step of heteroepitaxial growth must be twice carried out, i.e. heteroepitaxial growth of mixed crystal of Si-Group IV semiconductor on the Si substrate and further heteroepitaxial growth of Si on the mixed crystal of Si-Group IV semiconductor. Furthermore, the selective etching must be carried out twice, where etching solutions having a reverse selectivity to each other must be used. For example, in case of an etch-stop layer of SiGe, the first stage selective etching requires an etching solution having a higher etching rate on Si than that on SiGe, whereas the second stage requires an etching solution having a higher etching rate on SiGe than that on Si to the contrary. The second stage etching solution must have such a considerably higher selectivity as not to etch the Si layer, and furthermore the etch-stop layer is formed from the mixed crystal of Si-Group IV semiconductor, and thus cannot have a large thickness due to the productivity, crystallinity, etc. That is, the first stage selective etching must have a higher selectivity.
The selectivity of etching depends on differences in the structure, composition, etc., and when the mixed crystal of Si-Group IV semiconductor of the etch-stop layer is rich in Si, the crystallinity of the Si layer laid thereon will be improved, but will have a poor etching selectivity. To obtain a good selectivity on the other hand, the crystalline of the Si layer will be deteriorated.
Likewise, the second stage etching (to remove SiGe) can have a selectivity of only about 13:1, and it is difficult to conduct uniform etching on a wafer scale, and such a second etching is not commercially applicable from the viewpoints of controllability, productivity and cost. Furthermore, it is difficult to detect the end point of etching, because the materials are similar to each other.
In case of a substrate of light-transmissive material, typical of which is glass, a Si thin film deposited thereon is amorphous or polycrystalline at best due to the disorder of the substrate crystal structure, and no devices of high quality can be made. This is due to the amorphous structure of the substrate, and no monocrystalline layer of good quality can be obtained merely by depositing a Si layer thereon.
The light-transmissive substrate is important when it constitutes a contact sensor as a photo receptor device, or a projection-type liquid crystal image display unit. In order to make the sensor or image element (picture element) of the display unit more dense, more resolvable or finer, a more efficient driving device is required. As a result the device provided on the light-transmissive substrate must be made from a monocrystalline layer of good crystallinity. Thus, in case of amorphous or polycrystalline Si it is difficult to make a driving device of good quality required now or in future due to the crystal structure having many defects.